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Qualcomm Brings RISC-V Architecture to Android Wearables

Dado Ruvic / reuters

Qualcomm is collaborating with Google to create a RISC-V platform designed for Wear OS devices. RISC-V, an open standard instruction set architecture, defines how software controls the CPU and is open-source, potentially leading to open-source chip designs and reducing costs for chip development. This could encourage more companies to enter the industry, resulting in a broader range of devices, fostering innovation, and making more affordable options available.

Earlier this year, Google expressed its support for RISC-V as it aspired to compete on an equal footing with Arm. However, RISC-V technology is still in the early stages of development. According to Ars Technica, if all goes as planned, Qualcomm’s RISC-V platform could become the first mass-market RISC-V Android chip. This represents a significant challenge to Arm, which currently dominates the smartphone industry with its CPU architecture. In recent years, Arm has faced uncertainty, with Softbank attempting to sell the company to NVIDIA before regulatory intervention prevented the acquisition. Arm subsequently pursued a US IPO, raising $4.87 billion in September.

Qualcomm has announced that its RISC-V Snapdragon Wear platform will power the next generation of Wear OS devices. While the technology will be commercialized for global wearable products, an official launch date has not been disclosed. Qualcomm has already commenced development of the new chip and will provide further details on its timeline in the future.

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